Retail sales transaction terminal

ABSTRACT

A data input and function-directing terminal in the form of a point of sale transaction device having manually operable numerical and function specifying keys, and a data processor comprised of a read-only-memory, a set of data-handling registers and a read/write memory for manipulation of data between the terminal and various ones of a plurality of input/output devices according to a sequence of operator actions that are supervised by a fixed program in the read-only-memory, and variable program that may be entered manually into the processor.

United States Patent [72] inventors Elna!- Asbo Castro Valley; Joeepll R. Herr, Lee Altos Hills; Jerry W. Sublett, Newark, all C1111. [21] Appl. No. 855,904 [22] Filed Sept. 8, 1969 Patented Dec. 28, 1971 [73] Assignee The Singer Company New York, N.Y.

[$4] RETAIL SALES TRANSACTION TERMINAL 16 Claims, 18 Drawing Figs.

[52] US. Cl 3443/1715 [51] Int. Cl. ..G061 15/02, G06f 15/20 FleldolSearch 340M725. 152, 337; 235/1, 2, 7 R, 92 DP, R, R

[56] Relerenees Cited UNITED STATES PATENTS 2,883,255 4/1959 Anderson 340/172.5 X 3,353,163 11/1967 Soule, Jr. et a1. 340/172.5 3,533,076 10/1970 Perkins etal. 340/172.5 2,883,106 4/1959 Comwelletal 340/172.5 X

3,105,636 10/1963 Greene 340/172.5 X 3,302,189 1/1967 Korkowski et a1. 340/172.5 3,308,439 3/1967 Tink et a1 340/172.5 3,380,031 4/1968 Clayton et a1 340/1725 3,407.387 10/1968 Looschen et al.. 340/152 3,495,221 2/1970 Herendeen U 340]! 72.5 3,504,346 3/1970 Parsons et al 340/172.5 3,508,205 4/1970 Kubie 340/172.5

Primary Examiner Paul J. Henon Assistant Examiner-Harvey E. Springborn Altomeys- Patrick J. Schlesinger, Charles R. Lepchinsky, R

Perry Shipman and Jay M. Cantor Patented Dec. 28, 1971 9 Sheets-Sheet 1 wvenrons.

EiNAR L. A580 JOSEPH R. HERD JERRY W. SUBLETT AGENT.

Patented Dec. 28, 1971 3,631,403

9 Sheets-Sheet 5 FROM FROM FROM FROM FROM 1T1 U7, U5 1T4 U5 1 5 40. 1 f ab l 56 1 5301 15616 MTU MTU MTU MTU mu MASTER SLAVE SLAVE sLAvE SLAVE ,55 4 MODEM COMPUTER 40 TELEPHONE LINE FROM FROM FROM 1 40 IT 11-20 I m-wo LLUMLLUU LLUUII l1 Mill] 1! IHHHHHIW n SCANNER/ BUFFER 8 TAPE on msc FILE [TELEPHONE LINE y cdM'vuTsk {f Patented Dec. 28, 1971 msmucnou BUS ms 65 oecooea 12 KEY DEOODER 70 KEY- AND 2 BOARD Mm BUS BUFFER REGISTER 75 um 74 (KB) I ,4 l 2 L NKC T J KEY DECODER UGHTS REG\5TER AND CONTROL 75 DATA BU5 9 Sheets-Sheet 4 Patented Dec. 28, 1971 3,631,403

9 Sheets-Sheet 5 ms'rRucnoN BUS so l vscoosa ocR DISPLAY LAMP5 5mm (men. sass. DECIMAL POINT, W BLANK)DI6PLAY M95 G DATA aus- 5 [m SYMBOL maven IN5TRUCTION Bus mm MECHANICAL CONTROL ELEMENTS oecooea l I 50 PRINT PRlNTER MOTOR CHARACTER Ame comm. REGISTER H5 PAPER ADVANCE mm PR5??? 11@ ELEMENTS LOGO NT R 221 mom FORM 78 msERTEo T DATA Bus 2 SW! cu:s( Fe) Patented Dec. 28, 1971 3,631,403

9 Sheets-Sheet 6 RELEASE OPERATE 51 A LOCKED C9 OFF 50PERATE j-T mlz w JIINSTRUCT\ON BUS F 1 m DECODER mg 1 ggg a u5 MANUAL swncnas 114 (MR) 1m L DRAWER L o) OLE DRAWER 50 E CONTROL Patented Dec. 28, 1971 3,631,403

9 Sheets-Sheet 7 T msmucnou 205 oecoosa 51:? r L 156 RECENER) M0 BUFFER AND SHIFT OUTPUT asmsmz v2? comm V DATA sus- F 1 Z4- 11 1a 1 CASH 150 2 I DRAWER KEYBOARD DISPLAY PRINTING FORWARD umr UNIT UNT 1 um-r msmucnou DA'IA BUS Bus 15o? PROCESSOR 9 Sheets-Sheet 8 S 0am E2 QWN LT 3 53:0 20:33 azgm "653% mass insw Patented Dec. 28, 1971 9 Sheets-Sheet 9 DECODER MAC msmucnon I 1 I i 176 DATA 505 R/W MDR MEMORY MAR (MEM) 170 H7 J5B fismucnoN l 5 DECODER 1 12;0 190) f 160 A ARITH. o a z REG. UNIT REG. REG. REG.

II c/s x m V V DATA sus RETAIL SALES TRANSACTION TERMINAL BACKGROUND 1. Field of Invention This invention pertains to a data entry and transmission system, and more particularly concerns a data-handling system having a set of elementary data'operating elements, and a set of data manipulation control signals for accepting, operating on, and manipulating data between an input terminal and any of various peripheral devices.

2. Prior Art In the past, there have been developed data transaction or manipulation systems of the type wherein a single input terminal including numerical entry keys and function-specifying keys are coupled with a data processor which, in tum, is coupled with one or more input/output devices, commonly called peripherals. In such prior art systems, the data processor has been of the complex type wherein a very large number of interconnected elements are required to execute the various commands or functions required.

Further, in such prior art systems, operation or execution of the next step in a sequence of steps frequently is dependent upon the successful operation of an accessed peripheral. Thus, if such accessed peripheral is in a nonoperative condition, the entire system is rendered nonoperative. This is not desirable for a variety of reasons, among which is the fact that new data to be fed into the system cannot or should not wait until the peripheral becomes operative.

SUMMARY Briefly described, one preferred embodiment of the present invention is achieved as a point of sale transaction system, wherein an operator's, or input, terminal includes a set of manually operable numerical or decimal digit keys, and a plurality of manually operable functiominitiating keys, a printing unit, a set of status-indicating lamps including a number display, a set of function key illuminating lamps, a cash drawer of the type commonly associated with a "cash register, and data-handling and control units including a forwarding unit for transmitting and receiving data between the input terminal and a relatively remote data collection device. The data collection device may be a source of customer credit status information capable of transmitting credit status information to the input terminal upon request from the input terminal.

The data-handling and control units (hereinafier collectively termed operators terminal) includes a plurality of datareceiving and storage registers, an arithmetic unit, a sequencedirecting unit, a read/write memory, and controls for the manipulation and operation of data between the various parts of the system.

The sequence-directing unit stores a plurality of datamanipulating and function-directing control signals which are utilized to supervise the execution of the various data manipulations and arithmetic operations throughout the system. The sequence-directing unit is likened to a read-only-memory having a plurality of storage locations or address and each location having an instruction stored therein of the type usually associated with a computer, such as, for example, unconditional branch, conditional branch, etc.

The read/write memory serves as a unit for storing data, which data may be indicative of alphanumeric symbols to be printed by the printer and to be transmitted to an external device if such be attached to the basic system. Further, with the present invention, various codes may be entered by manual operation of the digit keys entered into the read/write memory to define desired operating characteristics and requirements of the various function keys. The sequencedirecting unit utilizes these codes in the normal sequence of events. Thus, management can "program" the operating sequence and requirements of the various data transactions or entries to be made by the ordinary operator, a sales clerk, for example.

It is therefore an object of the present invention to provide an improved data-handling system.

Another object of the present invention is to provide an improved point of transaction system.

Yet another object of the present invention is to provide a novel and improved arrangement for handling data received from a manually operable input means.

The features of novelty that are considered characteristic of this invention are set forth with particularity in the appended claims. The organization and method of operation of the invention may best be understood from the following description when read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a perspective illustration of the operators terminal of the present invention.

FIG. 2 is an illustration showing a data collection peripheral device connected with an operator's terminal of the present invention.

FIG. 3 is an illustration showing an off line arrangement for transfer of data from a peripheral device to other data-handling devices.

FIG. 4 is a simplified illustration showing a plurality of data collection devices connected between associated operator's terminals and a data-handling device.

FIG. 5 is a simplified illustration showing how a large plurality of operators terminals of the present invention may be coupled online with other data-handling devices.

FIG. 6 is an enlarged view of the keyboard of the operators terminal of FIG. 1.

FIG. 7 is a simplified logic block diagram of the keyboard unit of the present invention.

FIG. 8 is a simplified logic block diagram of the visual display unit of the present invention.

FIG. 9 is a simplified logic block diagram of the printing unit of the present invention.

FIG. 10 is an enlarged view of the cash drawer lock of the operator's terminal of FIG. I.

FIG. II is an enlarged view of die mode control switch of the operator's terminal of FIG. I.

FIG. 12 is an enlarged view of the program control switch of the operators terminal of FIG. I.

FIG. 13 is a simplified logic block diagram of the switches and cash drawer unit of the present invention.

FIG. I4 is a simplified logic block diagram of the data forwarding unit of the present invention.

FIG. 15 is a block diagram of the operators terminal of the present invention.

FIG. I6 (a, b, and c) is a logic block diagram of the processor of the present invention.

DESCRIPTION OF A PREFERRED EMBODIMENT In FIG. I there is shown the basic data input or operator's terminal 10, utilized in the present invention. The input terminal is shown and described as a point of sale terminal, such as utilized in a retail sales store in a manner that is commonly known as a cash register. However, as will be evident from the ensuing description, the input terminal 10 may be utilized in other specific environments for particular purposes of accepting input data, such as, for example, in a manufacturing operation for accepting data indicative of certain completed steps in a manufacturing operation and the like.

The input terminal I0 includes a set of manually operable data or digit keys 12, a set of function keys 14 (described in more detail below), a visual display panel 16, a printing unit IS, a status-indicating panel 20, and various control switches.

The input terminal 10 is mounted on the top of a cash drawer and electronic unit 26 which includes a cash drawer 28 having a key-operated switch 30 and an operating solenoid, plus drawer position status-detecting switches (not shown in FIG. I).

Within the lower portion of the cash drawer and electronic unit 26, there is mounted the functional electronic units (to be described in more complete detail below) associated with the input terminal 10.

The basic input terminal in conjunction with its functional electronic units is capable of operating by itself as a data transaction system, and is capable of operating in conjunction with one or more peripheral data-handling devices with or without the cash drawer 28 as part of the data transaction system.

In FIG. 2 there is indicated a single data collection device or peripheral which may be, for example, a magnetic tape handler, a magnetic disc handler, a paper tape perforator unit, and the like. When the data collection device is coupled with a single input terminal 10 by means of a data and control cable 32, all data entered and operated on by the input terminal is transmitted to and recorded in the data collection device. The data collection device may then be physically disconnected from its associated input terminal 10 and transported to a central data processor or data-handling system for further processing of the collected data as desired.

In FIG. 3 there is shown a single data collection device indicated as a magnetic tape unit, physically removed from its input terminal of FIG. 2 and connected to a scanner/buffer unit 42 which serves the function of accepting data from one or more of the magnetic tape units and transmitting the data to another data-handling device, such as for example, tape or disc file 41, or modem 43 for transmission to a remote computer 45 via telephone line 47.

In FIG. 4 there is shown five data collection peripherals 34a, 34b, 34c, 34d, and 34e, each of which may be of the type referred to above as data collection device of FIG. 2. Each data collection peripheral 34 is connected to an associated input terminal unit IT IT,, [T IT, and IT respectively, by way of associated data transmission and control cables (not numbered).

The data collection devices 34 are connected in parallel to each other by way of an interconnection signal and control channel 367 One of the data collection peripherals, 34a, is designated a master peripheral. and is coupled with a central data modem unit 38, by means of data and control channel 40. Upon command from the central data-handling or electronic data processor system 49, the data stored in each of the five data collection peripherals 34 is transmitted to the electronic data processor.

Another arrangement for using a plurality of data transaction systems of the present invention is shown in FIG. 5 wherein a plurality of up to I80 individual input terminals IT,. may be connected directly to a scanner/buffer unit 42 which, in turn, controls transmission of data between the input terminals and desired peripheral devices, such as for example, a magnetic tape or disc file 50 and/or an electronic data processor 49 coupled to the scanner/buffer 42 by suitable means, such as a modem 38 and a telephone line as in the FIG. 4 arrangement. The FIG. 5 arrangement may be termed a realtime or online arrangement wherein data may be transferred between the input terminals IT and the scanner/buffer unit 42 for subsequent transmittal between the peripheral devices 50 and/or 49 during the times that the Input Terminals are being utilized in their normal mode of operation, i.e., as point of transaction devices or cash registers.

This is to be contrasted with the arrangements shown in FIG. 3 where data is transferred from a peripheral device (tape unit) to a file 41 or computer 45 only by being disconnected from its associated input terminal (FIG. 2).

The tape or disc file 50 (FIG. 5) is accessible from each of the input terminals lT -lT and is useful for checking certain input information against fixed data in the file 41, such as for example, checking the credit status of an account number entered at the input terminals.

In FIG. 6, there is shown in more complete detail the keyboard of the input terminal of FIG. 1. In the middle of the keyboard, there is a set of IO normally operable digit keys 12 for entering numbers into the central processor section of the input terminal to be described in detail below.

On each side of the digit keys l2, there are disposed a series of manually operable function-initiating keys l4. The exact operations performed by actuation of each of these keys will be described in detail below. However, one important feature of the present invention is the inclusion of an illuminating lamp 54 (only one is shown in dotted lines in the tax key) within the body of each of the function keys 14 except three of the keys labeled in FIG. 6 as QUANTITY key, SUBTOTAL key, and AMOUNT TENDERED key. During normal opera tion of the input terminal, as for example, a sales person s entering the required data and computing the correct amounts for a retail sales transaction, various ones of the key lamps are illuminated to visually guide or instruct the operator to perform correctly the next required operation. Upon completion of each correct operation or step, a new set of key lamps will be illuminated and the previous ones will be extinguished as required and controlled by the logic of the apparatus.

In FIG. 7, there is shown a simplified block diagram of the logic units associated with the keys l2 and 14 of the keyboard unit.

A set of instruction signals or codes are transmitted in parallel over an instruction bus 80, which includes a plurality of parallel leads, from the processor (FIG. 16), to be described below, and are received in a keyboard unit decoding unit 68. The keyboard unit decoder recognizes two distinct keyboard codes, the first of which enables a keyboard register (KB) 72, and the second of which enables a next-keyboard-condition register 77.

Manual operation, i.e., depression, of any of the keys l2 and 14 of the keyboard causes generation of a unique set of key signals or code in any desired manner well known in the art, as for example, contact closures, and stores the key code in a keyboard decoding and buffer unit 64.

If a digit key 12 was operated, the key code in the buffer unit 64 will be transferred to the keyboard register 72. If, however, a function key 14 was operated, the key code in the buffer unit will be furnished to the input of the KB-register and a next-keyboard-condition decoder and control unit 76.

During operation of the system of the present invention, an instruction code will be furnished on instruction bus to the instruction decoder 68 which will enable the next-keyboardcondition register 77 and then a next keyboard condition data code will be transmitted over data bus 78 from the processor and received into the thus enabled NKC-register 77. The next keyboard condition code stored in the NKC-register defines which one or more of the function keys l4 may be operated next. The next keyboard condition code is furnished to a next keyboard condition decoder and control unit 76 which responds to the code contained in the NKOregister and provides lamp illumination power to the key lamp or lamps associated with those function keys l4 defined or specified by the code contained in the NKC-register.

The function key code furnished to the NKC-decoder 76 from the buffer unit 64 is compared with the NKC-code furnished to the NKC-decoder 76 from the NKC-register 77 and the NKC-decoder transmits an enabling signal to the KB- register if the function key that was operated, i.e., defined by the NKC-code in the NKC-register as being one that may be operated; in such an event the key code from the buffer unit 64 is entered into the KB-register for use as required by other units of the system when enabled to do so.

However, if the function key code furnished to the NKC- decoder 76 from the buffer unit 64 is determined by the NKC- decoder as being associated with a function key that is not within the group of correct function keys defined by the NKC- code stored in the NKC-register 77, the NKC-decoder will not enable entry of the key code from the key buffer 64 to the KB register. Thus, there will be no function key code entered into the KB-register if an incorrect function key is operated. The lack of entry of a function key code in the KB-register when an incorrect function key is operated has no real effect on the system; the system will simply wait until a correct function key is operated.

New data entered into the input terminal by manual operation of the digit keys 12 (FIGS. 1 and 6) is displayed visually on the visual display panel 16. Up to 13 decimal digits may be entered and displayed. When the entered data is representative of a whole number, such as, for example, a customer's account number, no decimal point is displayed on the visual display panel. 0n the other hand, when the data entered by operation of the digit keys is representative of a number having a decimal fraction portion, such as, for example, the price or money value of an article being purchased, a decimal point will be visually displayed between the second and third order digits from the right. Display or nondisplay of a decimal point is controlled by the internal logic units of the present invention. Control of decimal point display is primarily determined by the internal logics determination that the next function to be performed is an arithmetic operation, and therefore the data or digits entered between the last operation of a function key 14 and the next operation of a function key 14 is to have a decimal point display on the visual display panel. There is no separate decimal point display or enter key on the keyboard.

In addition, results of arithmetic operation on data already entered in the present invention is displayed on the visual display panel.

Further, certain inquiry operations initiated as described in more detail below cause display of stored data or information codes on the display panel. Stored data may be, for example, accumulated sales totals, while stored information codes may be, for example, a customer's credit rating or limit.

In FIG. 8, there is shown in simplified block diagram form the logic units associated with the visual display panel 16 of FIG. 1. The instruction bus 80 is coupled to a visual display unit decoder 92. A digit order instruction or code is transmitted over the instruction bus 80 from the processor (FIG. 16) and recognized or decoded by the decoder 92 which, in turn, transmits a display-enabling signal to a display column register (DCR) 96. The display column register 96 is thus placed in a condition to receive a decimal order or column defining set of data signals from the data bus 78 which comprises a plurality of parallel leads. A set of signals defining which decimal order of the visual display panel 16 (FIG. 1) is to display a numeral is then transmitted over the data bus 78 from the processor and received by the display column register 96. The display column register then conditions only those numeral-forming display lamps associated with the defined digit order in anticipation of a particular numeralspecifying set of data signals to be received on the data bus 78.

An instruction code is then transmitted over the instruction bus 80 from the processor and received by the visual display instruction decoder 92 which responds by transmitting a digit receive signal to a symbol register 98. The symbol register 98 is conditioned to respond to a numeral or symbol-defining set of signals to be received from the data bus 78.

A numeral or symbol-defining set of signals is then transmitted on the data bus 78 from the processor and received by the symbol register 98. The symbol register responds to the numeral-defining signals received therein and transmits a lamp-energizing signal to all the lamp-energizing circuits associated with the numeral or symbol to be displayed (as determined by the numeral-defining set of signals on data bus 78). Only that order (column) lamp-energizing circuit enabled by the previously received order defining set of signals now stored in the display column register is completely enabled. Thus, the correct or desired numeral or symbol illuminating lamps in the correct or desired decimal order is illuminated for visual observation.

Upon operation of certain ones of the function keys 14 (FIGS. 1 and 6), and sequence of events directed by the processor (FIG. 16) certain information is printed on a strip of paper 94 and, if desired, an inserted form 95 in the printing unit 18. The printing unit may be any type of printing apparatus desired that will accept character data signals sequentially for printing on preferably a horizontal printing area from right to left. In an embodiment of the present invention, actually built, the printing unit I8 is substantially like that shown and described in copending US. application, Ser. No. 724,880, filed Apr. 29. I968, by L. D. Chamness for Printing Means" and assigned to the same assignee as the present application. In addition, the printing unit includes a special logo printer which, upon command, prints a logo symbol on the paper.

Shown in FIG. 9 is the block diagram illustrating the basic logic units associated with the printer unit. Printer commands or instructions are transmitted over instruction bus from the processor (FIG. 13) and received in a printer decoder unit 104.

The decoder I04 will recognize an instruction code to enable response by the printers motor control unit 106. Upon receipt of a first particular data code from the processor (FIG. I6) via data bus 78 the printer motor (not shown but included as part of the printer mechanical elements unit I08) is turned on. The printer motor must be turned on for printing of numerals or symbols, and for advancing paper in the printer.

On the other hand, receipt of a second particular data code from the processor via data bus 78 following enabling of the motor control unit 106 by the motor control enabling instruc tion received in the decoder 104 via instruction bus 80 will cause the printer motor to be turned off.

In order to print a numeral or symbol after the printer motor is turned on, an instruction code is transmitted via the instruc tion bus 80 which is recognized by the decoder I04 as commanding a print operation; the decoder 104 transmits an enabling signal to a symbol print control unit which in turn conditions the electrical operating devices of the mechanical elements 108 of the printer and also conditions the character/line register (PRT) 112 for receiving character data from the data bus 78. A character-representing set of signals or data is then transmitted on the data bus 78 from the processor (FIGS. 16A, B and C) and received in the character/line register (PRT). The correct character (numeral, symbol or space) is then printed by the printer.

After repeating the above sequence of operations to print the desired characters on one line of the paper. the paper is advanced one or more lines as will now be described.

An instruction code from the processor (FIG. I6). received in the printer decoder unit is recognized as requiring a paper advance operation and the decoder 104 thus transmits an enabling signal to the paper advance control unit 114 which in turn responds by transmitting an enabling signal to the character/line register (PRT) 112 and the printer mechanical elements unit 108. A set of data signals or code defining the number of lines of paper to be advanced is then transmitted on the data bus 78 from the processor (FIGS. 16A, 8 and C) and entered into the character/line register (PRT) I12. The printer then advances paper the required number of lines.

When it is desired to print a logo on the paper in the printer an instruction indicating the logo printer is to be utilized is transmitted on the instruction bus 80 from the processor (FIG. 16) and recognized by the decoder I04. The decoder responds and transmits an enabling signal to a logo printer control unit 116. Then a set of data signals defining the condition that the logo printer is to be activated (or deactivated) is transmitted on the data bus 78 from the processor and received in the enabled logo printer control unit 116. The logo printer control unit then transmits an appropriate logo-actuating signal to the logo printer elements I18.

In FIG. I0, there is illustrated in more complete detail the cash drawer control switch 30 also shown in FIG. I. This switch is a key-operated threeposition switch; each position of the switch determines certain functions that may be performed during operation of the input terminal, as will now be described. The switch can be turned or moved from one posi tion to another only by insertion ofa tumbler-type key.

The *normal position of the switch 30 for normal opera' tion of the input terminal is with the key slot 31 in the horizontal operate position pointed to the index mark OPERATE. With the cash drawer switch in the operate position, the cash drawer opening is initiated exclusively by an instruction code originating in the processor. The processor will also initiate opening of the cash drawer as part of the operations per formed in response to manual actuation of the total key (FIG. 6) or void key.

When the key slot 31 of the cash drawer switch 30 is turned to the position pointing to the index mark RELEASE, the cash drawer will open automatically. This position of the switch can be used to open the drawer even when there is a power failure to the input terminal or a failure of the logic units in the input terminal to effect opening of the drawer.

The input tenninal of the present invention is operable in three different modes of operation. The mode that the terminal is operated in is controlled by a manually operable fourposition keylock mode control switch 190 shown in FIGS. 1 and II, located at the side of the cabinet structure (FIG. I) of the input terminal I0.

When the keyslot 292 of the mode control switch is pointed to OFF, as shown in FIG. II, no electrical power is furnished to the input terminal and thus the terminal is in a completely nonoperative condition.

Pivoting the mode control switch clockwise from the OFF position to the OPEN/X position will place the terminal in a fixed factor entry and accumulated data printout (FE-AP) mode of operation. Such mode of operation is utilized to enter variable data into the terminal 's read/write (R/W memory for use during otherwise normal operation. Such variable data in a sales transaction use of the present invention would be, for example, an input terminal identification or station number, a tax factor or percentage, a discount factor or percentage, and date-indicating numerals. The data that may be printed out, without clearing of such data may be, for example, tax total, discount total, cash total, and sales total.

When the mode control switch 290 is turned so that its keyslot 292 points to the third position marked OPERATE, the terminal is conditioned to operate in a normal data entry mode. Such normal data entry mode is the operation of the digit and function keys to enter a sales or other type of transaction into the input terminal.

Placing the mode control switch 290 to its fourth position, where the keyslot 292 points to CLOSE, automatically causes the terminal to initiate and complete a printout and clear mode of operation. In the printout and clear mode of operation all accumulated data is printed and such accumulated data is cleared from the storage locations in the R/W memory of the processor.

A program switch 294, as shown in FIG. I2, is used in conjunction with the mode control switch 290 to provide for programming the operating requirements and characteristics of the various function switches. The program switch 294 is operative only if the mode control switch 290 (FIG. II) is in its third or OPERATE position. With the mode switch in the OPERATE position, turning the program switch 294 so that its keyslot is pointed to the ON position will place the input terminal in programming mode ofoperation.

In FIG. I3, there is shown the logic control associated with the cash drawer and switch, as mentioned above. Briefly described, a set of instruction signals defining a command to open the cash drawer is transmitted over the instruction bus 80 from the processor and received by an instruction decoder unit I18. The decoder unit 118 responds by transmitting a drawer open command signal to a drawer opening solenoid control unit 124 which in turn furnishes electrical power to a solenoid I26 which is actuated to open the spring loaded cash drawer.

The cash drawer must be manually pushed to its closed posi tion.

During operation of the system of the present invention the status of the three manually operated switches 30 (FIG. 10), 290 (FIG. II), and 294 (FIG. I2) and the open or closed condition of the cash drawer is required to be known in order to determine and control subsequent action. Basically the determination is to determine what mode of operation the system is to operate in.

The manually operable switches mentioned above and a cash drawer position indicating switch are wired together as indicated in FIG. 13 by a drawer and manual switches unit (DWR) 128. Upon receipt of a unique instruction from the processor on the instruction bus indicating that a code indicative of the position of the manual switches and cash drawer is required, the decoder, which recognizes such unique code transmits a signal to the drawer and manual switches unit (DWR) 128 which in turn transmits the unique switches and drawer-indicating code on the data bus 78 to the processor.

When an input terminal 10 (FIG. I) is used with a peripheral device such as, for example, a tape unit (FIGS. 2 and 4), or scanner/buffer unit 42 (FIGS. 3 and S), a data forwarding unit (FU) I30 shown in FIG. I5 is utilized to accept data signals in parallel on the data bus 78 from the processor and efiect transfer of such data signals in serial over a communications channel to the attached peripheral device. Further, data signals may be received in serial from an attached peripheral device and transferred in parallel onto the data bus 78 by means of the forwarding unit 130.

In FIG. 14 there is shown in simplified form the logic units of the forwarding unit. Instruction codes are transmitted from the processor on the instruction bus 80 and received in a decoder 132. The decoder 132 recognizes a code which is to effect transfer of data from the processor into the forwarding unit and sends an enabling signal to a buffer and output control unit I34. Data signals from the processor are then transmitted in parallel on the data bus 78 and received in parallel in the enabled buffer and control unit I34. The buffer and con trol unit then controls transfer of the received data signals in parallel into a shift register I36. The data signals in the shift register then are transmitted in serial to a driver and receiver unit I38 which transmits the signals in serial over a communications channel to an attached peripheral device.

Data from an attached peripheral device may be transmitted over the communications channel I40 in serial to the driver and receiver unit I38 which in turn will transmit the data signals in serial into the shift register 136. Then an in struction code from the processor on the instruction bus 80 is received in the decoder 132 which recognizes the code as requesting a transfer of the data in the forward unit's shift register 136 to the processor. The decoder thus enables the shift register I36 to transfer its contents in parallel to the processor via the data bus 78.

The general logic organization of the input terminal is illustrated in FIG. 15. In this figure, the previously discussed keyboard unit 11, display unit 16, printing unit I8, cash drawer and switches unit 28, and forward unit I30 are shown interconnected by means of the instruction bus 80 and data bus 78 which are also connected with a processor unit I50. As is now apparent, only instruction data appears on the instruction bus 80 and all other data, including numeric data, appears on the data bus 78.

The processor unit includes a sequencer, a memory unit, an arithmetic unit and various other logic units, to be described in more detail below, for handling the transfer operations of various data items.

There will now be described the major logic organization of the processor of the present invention with reference to FIG. I6 (0, b and c).

In FIG. 160, there is shown an instruction storage means or sequencer I54. The sequencer contains L024 locations, each location having contained or stored therein an instruction in the form of a fixed or preset set of signals which are read from the sequencer when the location is addressed or selected.

The sequencer I54 may be any well-known means for accepting a large plurality of instructions in the form of coded signals, and for reading or accessing each instruction as desired without destroying the instruction. For example, the sequencer may be a preset, core memory, capacitive memory,

m n; W

struction being individually selectable or addressable, and 5 each addressed instruction being readable as a combination of electrical signals at certain ones of instruction decoders as discussed previously plus others to be discussed below.

In table I. there is set forth a list of the instructions conin each address or instruction sequencer. The instructions are set forth in the right-hand column of table I by a short English language statement of the effect that the combination of signals actually read out of the location will accomplish. In the left-hand column of table I in alignment with certain address locations is a term which identifies a main group or subgroup that begins at that location. The instructions are so arranged that one-half or instructions -5] 1 are considered to be part of main group instructions, while the other half, or instructions 512-1023 are contained sidered to be part of subgroup instructions.

The advantage in having main group instructions in one-half of the sequencer and subgroup instructions in the other half is the ease in going from a main group instruction to a subgroup and back to the main group with a very economical or minimum number of instructions in the sequencer 154.

location of the TABLE] Routine! Location Instruction Subroutine Name Start 0 Go to 908 I Go to 740 2 Set 0 into MAC 3 Set 63 into MEM 4 Go to 826 5 Go to 536 6 Set 8 into MEM 7 Go to 26 Mode 8 Move DWR into D (Determines 9 Set 48 into A what mode ID If. go to 502 ol'operation II Sct IS into A is required) II If. go to I00! I3 Set 4 into printer [releases logo printer) Enter A I Move DWR into A (keyboard I5 Set I into D entry) l6 It, go to 512 I7 Go to 526 I8 Move KB into A l9 Move A into B Set 2 into printer (turns print motor off] 2| If. go to B 22 Set 63 into D 23 I! go to 30 Reenter 24 Move KB to 0 (clears KI! register] (reenter 25 Set IS into DCR (turns visual display all) sequence Clean 26 Go to 536 (house 27 Move MDR into MEM cleaning" 28 Go to 740 sequence) 29 Go to 8 Dig. Test 30 Set 48 into D (entry of 3! If. go to 932 digits 32 Go to 738 33 Go to 542 34 Set l4 into MAC 35 Move MEM into A 36 Set 49 into B 37 II. go In B It Reen 3! Set 32 into KB (turns on reenter lamp] (turn on I'QGIIEY lamp sequence l i- (check previous function as being tax or discount) -t- A2 (Multiplier check) AI (Shift multiplier and product left) FUN-OP (function accepted) FUN-0P2 (Function sort No I] NEED ID (introduce identificationl TOTAL B (accumulate temp. totals) Cl (Remove leading IIIIIIIA BI 82 B3 III! III III Go to.

Go to 700 Go to 774 Go to 962 Set ll into MAR Set 0 into MAC Go to 74.

Set 29 into MEM Set 29 into 2 Go to 792 Set 50 into MAC Set 17 into MAR Set 0 into 5 Move MEM into A Set 49 into I) II go to 60 Decrease A by I Move A into MEM Go to 972 Go to 50 Decrease D by I If, go to 260 Set It into MAC Go to 738 Set 30 into MAR Set 48 into B Go to 738 Go to 50 Set I5 into DCR (turns visual display off) Go to 536 Move A into KB Move A into MEM Go to 526 Move MEM into MDR Move 8 into MEM Set 8 into MEM Move MEM into D Move 8 into MEM Set 9 into A It". go to 950 Set 4 into Z Go to 782 Set l5 into 7.

Go to 652 Set 7 into I Go to 59! Dec MAR by I Move B into A Set 8 into D If. go to I08 Set I5 into Z Set 30 into MAR Go to 652 nunzerul) II7 G to 526 IDIIII) C III Set 3I into MAR CLRTOT I86 G0 to 750 (update I19 Go to 150 (clear I57 Inc. MAR by I last nmount I20 00 to 780 totlh] Ill Inc. MAR by I printed) m Move MEM into MDR no Move MAR into A In Set 30 into MAR I90 Set 9 into D I23 Go to 736 "I II, 0 to I86 FOSPBI I24 Set 0 into MAC WAIT I91 G0 to I (lhifl I25 Set I3 into Z '0 (trlmrnit I93 Go to 740 number for and I'M Set I in AIS and C18 (let: AIS and printing] CIII) increment I95 Set l0 into MAC POSPBZ n Go to s" trcket I96 Set I2 IIIIO MAR number) I97 00 to 916 (move I27 Set 1') Into MAR Go a no number to I18 60 to SIII pm m 00 m no m Set :2 Into MhM buffer WAIT A 200 Set 3| Into A TOTAL 0 I Go 0 7 (Mode lent 2M Move DWR mm D and loop) 202 ll. 30 to :00 (Prepare I3I Go to 784 :03 Go m 1 to dumb print message) PRINT I! 104 Set 27 into Z (Pick up date 205 Set 40 into MEM PR MESS a 132 Set 0 am A :2; 3:3; B (print I33 Move D into MEM 20' Ma" ME Man character I34 If, go to 154 Se 8 in) MAC "0tc1t) I35 Move MAR into D 2"] on m I36 Set 28 into A 2 Go w I37 If. 30 to I71 I38 Go to 786 I39 G0 to I32 PEDT ZIZ G0 to I16 30 (transfer 3 Go to 536 PR MESS F 140 Go to 102 :13:33: ("amrcr GD m information to 2I6 Set 47 into I) word to I41 Set 32 mm D transmission 2" r 30 go to entry buffer I43 H, go to I48 if) and test for I44 BAMD Into MEM shift) I45 Set II into 2 I46 Go to 718 OVER (move IIB Go to 790 I41 G010 784 information 2I9 Go to 526 to print 220 Set 39 into D PR MESS c 149 Set to mm D 3 a 1"";{6 (IIIIII 149 u, go to m 3 fj D test) 150 BAMD into MEM n If So m 26 'ggg 225 Set 27 mm MAR 226 Set I6 into MEM I53 O0 to 784 227 G0 a 78 228 Set 7 into MEM I'll MESS D I54 Set 3 Into D 229 Go to 26 (Clear Tm us If, go to 741 for first I56 BAMDmto MEM TOD 23 Se! 32 imo A two charac- I57 Set 30 mm MAR set '3 in, MAR (mark tax ZJI Move MDR Into D '59 Go 0 temporary 232 Go to 700 totals] 233 If. go to 236 234 Set 2 Into A PR MESS D2 I60 Set 30 inIo MAR 235 Set II intn Z (Clear and I6] Set II into D dm :3 1:: TODA :36 Move AIS and CIS mm MEM 64 Sc 0 mm B (mlrll 237 BAID IIIIO MEN 5 Se I D dircount 138 Go to 964 66 s! lo in) Z temporary 239 If. 30 to 246 67 If no to 77s totals) 240 Set 0 Into A 68 St 29 "no a Z4I Set I Into MAC 69 w 780 241 Set 30 IIIIO B I70 Set I into printer (turns printer motor s Z 245 Go to 778 I7I Go to I30 60 PR MESS r: 172 Set 2: into MAR a (check for m Go to nan i am and m Move cm into D (fifth bit) 2 "K test mode] I75 Set 0 inIo A d'woum 4 no If, 50 to 204 "W 11'! Move MDR mm MEM P I78 Move DRW Into D 5c! A T000 250 Go m 11: 8 (move ZSI Go to 746 Ill D multiplier 252 5:: l2 into MAC A mm 253 5:130 into n s w 26 location) 254 00 to 916 255 Go to 700 PRCLRTOT nu Set 0 mm MAR "2" (Prepare I85 Set II into IRT (advunces piper II if"; ":2;

259 Go w 26 to clear temporary A5 lreposttmn pruduct) A7 (accumulate Trans tutal and temp totaIl A3 (check for cash total) XREADC KREADCI (tntaI in X reading) (test at totals m X read and eluse) SIII J37 .LIB 339 Set SI into MA R G I SIG Set intn MAC Set 5 mm MEM (In In 700 G0 to 774 Set 5 mm D II'. go In 1012 Go tn 970 Set 4 into I) Set 4 Into 7.

Set 30 tntu MAR Go to 582 Set 4 into B G0 to 700 Go to 774 Set I intu D If, so to 281 Move A Inln I! (in to 596 Move (/8 into D Set 0 Into A Set 3| t'ntu MAR (in to 518 (In In 780 (in In 784 MGMTDISC Ienter '1 discount] 5 MGMTEND MGMTTAX (enter 0 tax) MUMTID (enter rcgistet ID! PRGRMI (lnmalize program deveIupment) PROGRA Pmgrarn Development] Set 32 mto AIS and (ID (sets AIS.

resets C/B Set 3 into MEM Set 30 into B Set [5 Into 1 Go to 626 (in In 651 G0 to 736 Set 27 into MAR Set I! into MAC (in to 966 If gu to M4 (In In 746 (In to 274 Set 30 intn MAR Set 0 into MA( (.in In 748 (m In 50 Go I0 921 Set 33 into MEM Set 1 into MAC Move MEM into MDR Set 9 into B Go In 53! Move D mm MEM Go to 'IMREADA Move Z intu MAC Move MAC into D II. go to 978 UK) I0 781 Set 9 into MEM (in to 744 Set II intn MAR Set 0 intu MAC Inc 7. by I Inc I by I Mnve 7. Into MIIM (in Il) H4 NOP (ACH

(cash and charge keysl NPI'IDI' (funclmn key mrt No II MDDhMI (Dept.

mdse and mist:

JSI 352 Set 4 into '1'.

(in In 77! Set Il intu B Set II intu MAC Cut to I I6 (in to I30 Set 4 Into 2 Go to 77! Set 8 into B Move MEM into MDR Move B into MEM Go In 790 (in to 526 G0 to 938 On I0 I30 Set I1 into B Set 9 into D Set 0 into MAC Move MEM intu MDR Mnve B Intn MI'IM Set 30 inlu MAR Move MEM intn I! Set 0 Intn 7.

Move Z mm D Move MEM inlu A BAPD into 2 Move MAC into A Inc. MAL by I Set 8 inn D Mnve MEM into A Set 9 intn MAR Mnve II into MAC Move MEM intn H Mnve A tntn MEM Increase MAR by I Mnvc MEM inm MDR Muve Z mtu MEM Go to I30 Set It mm D If. gt) to 386 (in to 700 (in In 826 (in to I14 Move II into A Set I] tntn D II, 30 In 381 Set I4 Into I) If go In 40 (in In 826 Gu I0 700 Move AIS intn A [sixth hull Muve C/B inlu D (fifth Int) BAMI) intu MEM (in tn "(IN Set I intu I) II go to 420 Muve MDR into MEM (in lo 746 Set I I into 7.

(in In 778 Set 29 inm MAR G0 to SIB Go to 780 Muve MEM mm D Set 40 mm A If. go In 415 Muvc MDR IIIIU MEM Set 36 mm A Set [I into 7.

II. so to 250 NOP Move MDR mtu MlzM Set 17 into MAR Scl 2 inIn MEM (in In I30 manipulutinn) EARLY (move cntricl to print buffer) QTY (quantity routine) MEMJ (mcrno with add-subtract) MEMZ (mcmu with cash-charge) ACCT ACCT] [account transmission starting oint) (rcpcal pnint in account transmisxiun OMIT (avoid Icading Icms) AMTTEN (change cmnpulation MOD I05 (mudulu tcn double add! G0 to 790 Go lo 526 Sci 37 into D Ii. 50 to 4I6 Set 38 into D 5e! 4 into Z ll. 50 to 250 G0 to 784 Set 5 into MEM Go to I30 Move MEM mm MDR Sci 5 into MEM (In to 700 Set I I inlu 7.

Set 30 into MAR (it) to I16 Go In 799 Go in 826 Set I6 intu Z NOP Set I0 into KB lturns 0n transmit lamp) Set III into FU (transmission start code] Mtvvc Z inlu MAC Dec. Z by I Move MEM into A Move A inln MEM Set I intu D If, 30 to 450 Move A into FU NOP Sci 0 into A If, so to 442 Set 23 into FU (cm! ui' transmission cndc) Mnvc FU into A tcrmr nr lack 0f crrur in transmission cudc) Set 22 into I) If, go in 438 Set 24 into D Sct ll intn KB (turn rifftransmit lamp] Movc FU into D (credit rating code) Set 62 intu A If. go in ISO Move D into 7.

(in In 536 Set l6 into MEM Go In 740 Set 0 into MAC Set 26 int MEM Muvc Z into B (in to 738 (in In 566 (in In I126 Set 29 inn: 8

Go to 780 474 G0 to 26 G0 to ill Sc! 33 into D If. go m 38 Move A into MEM Go tu 972 G0 to 652 Move (/8 into A lfifih bit) Set l5 into DCR (turn off visual dispiay) Go to 38 Set 32 into AIS and (/B (sci: AIS,

resets C/Bl Mnvc D min A MOD I0 58 VOID 2 (void print message, cnrrcclion) CLOSE (initiate close sequence XVOID (void kcy in management X reading! DWR/DISP [sequence tn blank display after closing cash drawer) CLEAR C(IM (initialim full clear routinlz) CLEAR (Llcur sequence) INIT EB (Examine Column 00 in entry buffer) T0 I'NKC (pick lutal NKC in X readingsl INlT N KC (initialize location of stared N KC VERIFY tinitiali/c for modulu l I vcrificatinn) VERIFY 2 (module II verification xcqucnce) SI I 550 SSI BCDALG Into B (A an added to D according to AIS and the first fnur hit: nl'th: result arc set into B in BC!) codc) Move B into D (no to 784 Set 33 intn MEM S2129 irltn MAR Sc! 33 into MEM (in to 826 (m in I30 Cm hr 922 Set I intu MI-LM G0 to 322 NOP (in to $36 Movc MDR imn A Move MDR intu MhM Sat I4 intu D If, 30 to l4 G0 to 0 Set 9 inm MAC Set ll imu MAR Muvc MliM intri A If. return-induct] Set 15 ink! DfR (turns visual display Set JI inlu MAR Set I5 intu MAI.

Set I5 inlu D Inc. MAC by l Mtivc MEM into MDR Movc MAC into A If, go to 520 Muve MAR into B Return-induct! Set .10 into MAR Set 0 into MAC Muvc MEM mm A Mme MDR into MEM Mnvc MDR into 7.

Return-Indexed Set 9 inlu MAC Set 9 into MAR Move MliM intu D Move D inlu MEM Set ll tntn MAR Set Win10 MAC Mnvc MEM into A lncr MAC by l Muvc MEM intu KR Return-indented Set 0 mm MAC Move MEM inlu Z Int:v MA( by I Move MEM into A Set 48 into D Move A into M If, 50 to 558 HAMD Into B Move B into A Mnvc 7. into D HAPD into 7.

V E llll-Y l (elim inlte lending keyboard zerol) NEG C R (clear display before new display) DISPLA Y t p y sequence DISPLAY l w v n SH FTL liF initial shift left DET ALG7 (full initialization for add or subtract) DET ALG (partial initialization for odd or lubrnct) DETBA LG (de I: no ine what algebraic ope ration is required DETAALG (eel AIS as required) ALGADD 57 I 57 9 5" SI l Move Z into A Set ll into D If. go to 544 BAMD into Z (in to 5 Dec. MAC by l Move MEM into A Set 49 into D If. return-indexed Move A into MEM Set 0 into MAC Move Z into MEM Set 0 into AIS treieu AIS and reeet:

CIB

Set into DCR (turn: dilpley oft) Set 6 into MAC Move MAC into DCR (leleetl decimal order) Inc. MAC by l Move MEM into A Set 16 into D If, go to 57! Move MDR into MEM Move MDR into DSPLY (number to selected dilplly digit order) Set I3 into D Move MAC into A Move CIB into A (fifth bit) If, return-indexed Set 60 into DSPLY (a lign) Return-Indexed Set ll into B Set I) into MAC Inc MAC by I Set I5 into D Move MEM into MDR Move B into MEM Move MDR into B Move MAC into A If, go to 584 Inc. Z by l Move Z into A Inc. MAC by I It, .0 to 582 Return-lndeled Set 30 into MAR Set 7 into Z Set 0 into MAC Set 32 into D Move MEM into A Move MDR irito MEM BAPD into AIS (Ind C/Bl Move AIS (and (/8 into A) Move MAR into D Move B into MAR Move D into B Move MEM into D Move 0 into MEM BAPD into AIS (and C/Bl Move CIB into D (fifth bit] Set 0 into A ll, 30 to 614 Set 32 into D Move BAPD into AIS Set I into MAC Move MAR into A lilo bruit: ope rltion ALGADDA (special ltort for i A LG ADD ALGADOB (tpeciel start for ALGADD) COM P etlfl eomple ment R E M LDZ l remove lending zeroe REM LDZ'L leadin zeroe removal l R E M LDZ Y (inuire :ignificent 2 place: right of decimal) DltP ( deter mine sign to be displayed PR l N T Z in itillize print and let special ch: rlcter lOlOlb Move It into MAR Move A into 5 Move MEM into D Move D into MEM Move MAR into A Move 8 into MAR Move A into 8 Move MEM into A BCDALG into MEM KA+D lllebrliellly MEM. carry is In) Inc. MAC by I Set 0 into A Move MEM iolo D BCDALG (A+D) into MEM Move MAC into A Move 2 into D Return-indexed Move A into MAC Set IS into DCR (turns display oil) Move MEM into D Set I into DCR Set 48 into A Set 48 into MEM Move D into MEM If. 50 lo 66! Set 3 into D Move MAC into A Move MEM into MDR Dee. MAC by 1 Move MAC into D Set 0 into A It. to lo 654 Set 59 into DSPLY (decimal point in ditplay) Set 0 into A Move MAC into D Set 0 into MAC Move MM into AIS and C18 Move MDR into MEM Move CID into D (filth bit] Move MEM into A BAMD into MEM Set 32 into AIS lltll AIS. rents CID) Go to 566 Set 15 mm MAC Move MEM into A Set 0 into MAC Move A into MEM Set 30 into MAR Set 15 into MAC Move FFC into D (front form inserted or not code into D) Set 32 into A It, 0 to 690 Set 27 into MEM PRINT A {print Sequence) lA FLAG (inlpect accumulate] cash flag) FENTEST (function entry test) V TEST (verification test) DEC IN SRT [initialize decimal insertion] DECINSR (selective initialization for shift lcltl CLEAR EB tinilialile condition for clearing entry buffer) A to MEM (minor branch in developing print messages] initialize partial clear of high order columns) X MULT (initialize to clear multiplier) IPCLRHA (clear multiplier Move MEM into PRT Set l into D Move MAC into A Inc MAC by I It. go to 690 Dec. MAR by l Move MAR into D Set 27 into A If. go to 690 Set I into PRT (ndvlnees paper by 1 line] Set 27 into MAR Set 0 into MAC Move MEM into AIS and C!!! Retum-lndexed Set 9 into MAR Move 8 into MAC Move MEM into D Move D into MEM lnc. MAR by l Move MEM into Z Move 7. into MEM Set 10 into MAC Set It into MAR Move D into MEM Set Jll into MAR Move Z into MAC Move MEM into D Set 0 into A If, go to 38 Set 16 into D Move Z into A If. go to 68 Set I into MAC Move MEM into A Move A into MEM If, 50 to 38 Move Z into A Set 32 into D If, go to 68 Set 48 into D If, go to 990 Set 0 into A Set 0 into MAC Move MEM into D If so to 38 Go to 68 Set 27 into B Set 1 into MAC Set i into 7, (E0 to 584 Set 30 into MAR Go to SIB Move A to MEM Go to I60 Set 7 into MAC Go to 748 Set 27 into MAR Set ll into MAC Set I5 into D Go to 520 and high order columns) IPCLRL (clear of lovv order columns] IPCLRLA (clear of low order columns) SEL ROW (select meaeage containing row PR ROW (select row to be printed) CASH TEST (test for temp. cash total) MNACCFLG (clear two most significant bits from character] SHIFTEB (initialize for shift left of entry butter! XFUREB (initialize transfer from entry buffer to another row) XFURZEB (initialize transfer to entry buffer from another row) R PC HA R t ead character defining print message) RPCHARA (read character defining print message) EBTOPBZ (transfer of entry buffer contents to print XFUR Set 7 into D Set 32 into AIS (8r C/Bt (set: AIS.

resets C/Bl Set l5 into MAC Go to 520 Set 30 into R Go to Set 0 into A Move C/B into D (fifth bit) If. go to 600 Go to 598 Move MDR into MEM Move MDR into MAC Move MAC into A Rcturmlndeited Set 30 into MAR Go to 582 Set 30 into Z (in to 792 Set 30 into B Go to 791 Set 17 into MAR Set 0 into MAC Inc. MAR by l Move MEM into A Move A into D Return-lndeled Set 30 into Z Set 1! into B Set 0 into A 

1. A retail sales transaction terminal comprising: a plurality of manually operable digit keys for entering numeric data into said terminal; means operatively coupled to said digit keys for generating data signals indicative of the digit key operated; a plurality of manually operable function keys for entering functional data into said terminal; means operatively coupled to said function keys for generating data signals indicative of the function key operated; sequencing means operatively coupled to both said means for generating data signals indicative of operated digit and function keys; said sequencing means having a plurality of stored instructions for effecting predetermined operations in said terminal; said sequencing means having a first output coupled to a first common bus and a second output coupled to a second common bus with instruction data appearing on said first common bus and other data appearing on said second common bus; a memory coupled between said first and second common bus and having a plurality of storage locations; instruction decoding means coupled to said first bus for entering certain of said data signals into certain locations in said memory; and an arithmetic unit electrically coupled between said first and second bus which performs arithmetic operations on certain numeric data under control of certain said instructions.
 2. The transaction terminal according to claim 1 wherein: said plurality of instructions are divided into two groups; selector means coupled to said sequencing means and normally operating to effect the execution of a first sequence of successive ones of said instructions in a group; said selector means being responsive to certain instructions in said first sequence for initiating the execution of a second sequence of instructions in either of two groups; said selector means including means responsive to certain instructions in said second sequence for initiating the execution of a third sequence of instructions starting at the instruction immediately following the instruction that initiated said second sequence.
 3. The transaction terminal according to claim 2 wherein: the execution of certain said instructions generates a first and second code; said arithmetic unit includes means for comparing the value of said first and second codes; said means for comparing providing an output which is coupled to said selector means to cause said selector means to continue effecting the execution of successive instructions when the first code is at least equal to the value of the second code and to effect the execution of another sequence of successive instructions when the value of said first code is less than the value of said second code.
 4. The transaction terminal according to claim 2 wherein said selector means includes: an instruction register coupled to said means for temporarily storing individual ones of said instructions therein; at least some of said instructions including other data such as numeric data, address locations and the like; a decoder having its input coupled to said instruction register and a first output coupled to said first common bus and a second output coupled to said second common bus for decoding said instructions in said instruction register and applying instruction data only to said first common bus and other data to said second common bus.
 5. The traNsaction terminal according to claim 4 wherein: said plurality of instructions stored in said sequencing means are divided into two groups; and group selecting means coupled to said decoder cause individual instructions from either of said two instruction groups to be entered into said instruction register in response to data appearing in said decoder.
 6. The transaction terminal according to claim 1 wherein said arithmetic unit includes: a plurality of registers coupled to said second common bus; a decoder coupled between said first common bus and said plurality of registers and responsive to certain instruction data appearing on said first common bus for enabling transfer of data between various ones of said registers and between said memory and said registers by way of said second bus.
 7. The transaction terminal according to claim 6 wherein: said arithmetic unit performs arithmetic operations on data in two of said registers.
 8. The transaction terminal according to claim 6 further including: multidigit display means coupled to said second common bus; decoder means coupled between said first common bus and said display means for enabling the visual display by said display means of data in at least one of said registers in response to certain instruction data appearing on said first common bus.
 9. The transaction terminal according to claim 1 wherein: at least some of said function keys have key illumination means associated therewith; said memory including stored data indicative of which ones of said function keys are to be next operated after execution of a certain function; said illumination means being responsive to said data in said memory to enable the illumination means associated with the function key next to be actuated to be energized in response to the execution of a certain function.
 10. The transaction terminal according to claim 1 further including: a cash drawer having a closed and an open position; cash drawer opening means coupled to said first common bus and responsive to certain data appearing on said first common bus for opening said cash drawer.
 11. The transaction terminal according to claim 1 further including: a data receiving and transmitting device coupled between said first and second common bus for transferring data from said terminal to a peripheral device and to enter data from said peripheral device into said transaction terminal.
 12. The transaction terminal according to claim 11 wherein said data receiving and transmitting device includes: a shift register having a parallel input coupled to said second common bus and a serial output adapted to be received by said peripheral device; and a decoder coupled between said shift register and said first common bus for entering data on said second common bus into said shift register in response to certain instruction data appearing on said first common bus.
 13. An apparatus according to claim 1 wherein at least said digit keys enable predetermined data codes to be entered into said memory which codes are indicative of the maximum number of digit keys that may be operated immediately prior to operation of predetermined ones of said function keys.
 14. An apparatus according to claim 1 wherein at least said digit keys enable predetermined data codes to be entered into said memory which codes are indicative of a requirement for operation or no operation of said decimal digit keys immediately prior to operation of predetermined ones of said function keys.
 15. An apparatus according to claim 1 wherein at least said digit keys enable predetermined codes to be entered into said memory which codes are indicative of a requirement for operation of decimal digit keys including entry of a check digit immediately prior to operation of predetermined ones of said function keys.
 16. The transaction terminal according to claim 1 wherein: both said means for generating data signals indicative of opeRated digit and function keys are coupled to said sequencing means by way of said first and second bus. 